Two powerful Cray XT5 systems at the Oak Ridge National Laboratory computing complex outmuscled competitors to win half of this year's High-Performance Computing (HPC) Challenge awards. Results of the "Best Performance" awards, which measure excellence in handling computing workloads, were announced Nov. 17 at SC09, an international gathering of supercomputing professionals.
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A Cray XT5 supercomputer named Jaguar that runs scientific applications at the U.S. Department of Energy's (DOE's) Oak Ridge National Laboratory (ORNL) placed in three out of four categories at the High-Performance Computing (HPC) Challenge awards, winning two "gold medals" and one "bronze" in this head-to-head competition.
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Argonne was the clear winner in two of the four categories awarded in the HPC Challenge best performance benchmark competition, which were run using 32 racks of Argonne's Blue Gene/P.
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MIT Lincoln Laboratory (http://www.ll.mit.edu/.) has enabled its next generation LLGrid interactive/on-demand parallel computing system. This system was provided to Lincoln Laboratory via a DoD High Performance Computing Modernization Program (HPCMP) Distributed High Performance Investment in collaboration with Dell Computer, Inc.
The DoD HPCMP-mandated acceptance test was conducted using the HPC Challenge benchmark suite (http://icl.cs.utk.edu/hpcc/). This benchmark suite is designed to stress a wide variety of parallel components: processor, memory, network bandwidth, and network latency. As part of the acceptance test, Lincoln Laboratory ran 170 variations using different processors and memory sizes.
This baseline performance data is available here, MIT LLGrid data.
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The HPC Challenge (HPCC) benchmark suite has been funded by the DARPA High Productivity Computing Systems (HPCS) program to help define the performance boundaries of future Petascale computing systems. HPCC is a suite of tests that examine the performance of high-end architectures using kernels with memory access patterns more challenging than those of the High Performance LINPACK (HPL) benchmark used in the Top500 list.
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The DARPA High Productivity Computing Systems (HPCS) Program and HPCWire are pleased to announce the second annual HPC Challenge Award Competition.
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IBM has dominated the first annual HPC Challenge Competition at the Supercomputing 2005 Conference. The DOE/NNSA/LLNL team, using IBM's Blue Gene/L system, swept all four Class 1 benchmark awards. The IBM team tied with the Cray team for the Class 2 "elegant" implemention award.
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In the 17th year of SC, he is serving as the co-chair for the first year of the HPC Challenge award competition, the results of which are being revealed today. The goal of the competition, which is sponsored by DARPA's High Productivity Computing Systems Program and HPCwire, is to develop a set of HPC hardware and software capabilities that become de rigeur for the productive use of all HPC systems.
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The deadline is approaching for the HPC Challenge Class 2 competition. It is considered the most "elegant" implementation of two or more of the HPC Challenge benchmarks with special emphasis being placed on Global HPL, Global RandomAccess, EP STREAM (Triad) per system and Global FFT.
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HPCwire recently spoke with Marie-Christine Sawley, director of the Swiss National Supercomputing Center (CSCS), about its use of the relatively new HPC Challenge benchmark for recent large-scale supercomputer procurement. Although HPCwire expects the U.S. government to begin using the HPC Challenge in procurements soon, CSCS may be the world's first major site to do this.
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According to Cray and AMD, two Cray supercomputer products that leverage the AMD Opteron processor and HyperTransport technology, the Cray XT3 and Cray XD1 systems, have posted leading overall results on the HPC Challenge benchmark tests.
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The DARPA High Productivity Computing Systems (HPCS) Program and HPCWire are pleased to announce the first annual HPC Challenge Award Competition (http://www.hpcchallenge.org/).
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The HPC Challenge benchmark is providing a new in-depth analysis of system performance. The HPC Challenge benchmark clearly shows the strength of parallel vector architectures and highly integrated systems with high bandwidth, low latency memory subsystems.
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The simplest punchline is that HPCC Linpack plus the four HPCC memory-access benchmarks give you data so that you can use the locality characteristics of the computational phases of your applications to predict when you will get Linpack-class performance from a given phase and when you will get much less.
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